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  1 idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver military and industrial temperature ranges features: ? 0.5 micron cmos technology  high-speed, low-power cmos replacement for abt functions  typical t sk(o) (output skew) < 250ps  low input and output leakage 1a (max.)  esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0)  high drive outputs (-32ma i oh , 64ma i ol )  power off disable outputs permit ?live insertion?  typical v olp (output ground bounce) < 1.0v at v cc = 5v, t a = 25c  available in the following packages: ? industrial: ssop, tssop ? military: cerpack functional block diagram the idt logo is a registered trademark of integrated device technology, inc. june 2000 military and industrial temperature ranges 2000 integrated device technology, inc. dsc-5442/1 idt54/74fct16952at/bt/ct/et fast cmos 16-bit registered transceiver description: the fct16952t 16-bit registered transceiver is built using advanced dual metal cmos technology. these high-speed, low-power devices are organized as two independent 8-bit d-type registered transceivers with separate input and output control for independent control of data flow in either direction. for example, the a-to-b enable (x ceab ) must be low to enter data from the a port. xclkab controls the clocking function. when xclkab toggles from low-to-high, the data present on the a port will be clocked into the register. x oeab performs the output enable function on the b port. data flow from the b port to a port is similar but requires using x ceba , xclkba, and x oeba inputs. full 16-bit operation is achieved by tying the control pins of the independent transceivers together. the fct16952t is ideally suited for driving high-capacitance loads and low-impedance backplanes. the output buffers are designed with power off disable capability allowing "live insertion" of boards when used as backplane drivers. 2 oeab 2 ceba 2 clkba 2 oeba 2 ceab 2 clkab 2 a 1 2 b 1 to seven other channels d c d c ce ce 1 oeab 1 ceba 1 clkba 1 oeba 1 ceab 1 clkab 1 a 1 1 b 1 to seven other channels d c d c ce ce 54 55 1 3 2 56 5 52 31 30 28 26 27 29 15 42
2 military and industrial temperature ranges idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver pin configuration symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +120 ma absolute maximum ratings (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. all device terminals except fct162xxx output and i/o terminals. 3. output and i/o terminals for fct162xxx. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3.5 6 pf c out output capacitance v out = 0v 3.5 8 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. ssop/ tssop/ cerpack top view 1 b 1 1 b 2 gnd 1 b 3 1 b 4 v cc 1 b 5 1 b 6 1 oeba 1 b 7 1 b 8 2 b 1 2 b 2 gnd 2 b 3 2 b 4 v cc 2 b 5 gnd 1 clkba 2 b 7 2 b 6 2 b 8 gnd 2 clkba 2 oeba 1 clkab gnd 1 a 1 1 a 2 v cc 1 a 3 1 a 4 gnd 1 a 5 1 a 6 1 a 7 1 a 8 gnd 2 a 1 2 a 2 v cc 2 a 3 2 a 5 2 a 4 2 a 7 gnd 2 a 8 2 clkab 2 a 6 1 oeab 1 ceab 2 oeab 2 ceab 2 ceba 1 ceba 47 37 38 39 40 41 42 43 44 45 46 33 34 35 36 56 55 49 50 51 52 53 54 48 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 29 30 31 32 25 26 27 28 pin description pin names description x oeab a-to-b output enable input (active low) x oeba b-to-a output enable input (active low) x ceab a-to-b clock enable input (active low) x ceba b-to-a clock enable input (active low) xclkab a-to-b clock input xclkba b-to-a clock input x a x a-to-b data inputs or b-to-a 3-state outputs x b x b-to-a data inputs or a-to-b 3-state outputs function table (1,3) inputs outputs x ceab xclkab x oeab xax xbx hx l xb (2) xl l xb (2) l lll l lhh xx h xz notes: 1. a-to-b data flow is shown: b-to-a data flow is similar but uses x ceba , xclkba, and x oeba . 2. level of b before the indicated steady-state input conditions were established. 3. h = high voltage level l = low voltage level x = don't care = low-to-high transition z = high-impedance
3 idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver military and industrial temperature ranges symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (input pins) (5) v cc = max. v i = v cc ??1a input high current (i/o pins) (5) ??1 i il input low current (input pins) (5) v i = gnd ? ? 1 input low current (i/o pins) (5) ??1 i ozh high impedance output current v cc = max. v o = 2.7v ? ? 1 a i ozl (3-state output pins) (5) v o = 0.5v ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?80 ?140 ?250 ma v h input hysteresis ? ? 100 ? mv i ccl quiescent power supply current v cc = max. ? 5 500 a i cch v in = gnd or v cc i ccz dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 10%; military: t a = ?55c to +125c, v cc = 5.0v 10% notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. duration of the condition can not exceed one second. 5. the test limit for this parameter is 5 a at t a = -55c. symbol parameter test conditions (1) min. typ. (2) max. unit i o output drive current v cc = max., v o = 2.5v (3) ?50 ? ?180 ma v oh output high voltage v cc = min. i oh = ?3ma 2.5 3.5 ? v in = v ih or v il i oh = ?12ma mil 2.4 3.5 ? i oh = ?15ma ind v i oh = ?24ma mil 2 3 ? i oh = ?32ma ind (4) v oh output low voltage v cc = min. i ol = 48ma mil ? 0.2 0.55 v v in = v ih or v il i ol = 64ma ind i off input/output power off leakage (5) v cc = 0v, v in or v o 4.5v ? ? 1 a output drive characteristics
4 military and industrial temperature ranges idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver symbol parameter test conditions (1) min. typ. (2) max. unit ? i cc quiescent power supply v cc = max. ? 0.5 1.5 ma current ttl inputs high v in = 3.4v (3) i ccd dynamic power supply current (4) v cc = max., v in = v cc ? 75 120 a / outputs open v in = gnd mhz x oeab = x oeba = gnd one input toggling 50% duty cycle i c total power supply current (6) v cc = max., outputs open v in = v cc ? 0.8 1.7 ma f cp = 10mhz (xclkab) v in = gnd 50% duty cycle x oeab = x ceab = gnd x oeba = v cc v in = 3.4v ? 1.3 3.2 fi = 5mhz v in = gnd 50% duty cycle one bit toggling v cc = max., outputs open v in = v cc ? 3.8 6.5 (5) f cp = 10mhz (xclkab) v in = gnd 50% duty cycle x oeab = x ceab = gnd x oeba = v cc v in = 3.4v ? 8.3 20 (5) fi = 2.5mhz v in = gnd 50% duty cycle sixteen bits toggling power supply characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f cp n cp /2 + fini) i cc = quiescent current (i ccl , i cch and i ccz ) ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp f i = input frequency n i = number of inputs at f i
5 idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver military and industrial temperature ranges notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this limit is guaranteed but not tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. switching characteristics over operating range - industrial fct16952at fct16952bt fct16952ct fct16952et symbol parameter condition (1) min . (2) max . min . (2) max . min . (2) max . min . (2) max . unit t plh propagation delay c l = 50pf 2 10 2 7.5 2 6.3 1.5 3.7 ns t phl xclkab, xclkba to xbx, xax r l = 500 ? t pzh output enabletime 1.5 10.5 1.5 8 1.5 7 1.5 4.4 ns t pzl x oeba , x oeab to xax, xbx t phz output disable time 1.5 10 1.5 7.5 1.5 6.5 1.5 3.6 ns t plz x oeba , x oeab to xax, xbx t su set-up time, high or low 2.5 ? 2.5 ? 2.5 ? 1.5 ? ns xax, xbx to xclkab, xclkba t h hold time, high or low 2 ? 1.5 ? 1.5 ? 0 ? ns xax, xbx to xclkab, xclkba t su set-up time, high or low 3 ? 3 ? 3 ? 2 ? ns x ceba , x ceab , to xclkab, xclkba t h hold time, high or low 2 ? 2 ? 2 ? 0 ? ns x ceba , x ceab , to xclkab, xclkba t w pulse width high or low, xclkab or xclkba (3) 3 ?3?3?3?ns t sk (o) output skew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns switching characteristics over operating range - military fct16952at fct16952bt fct16952ct fct16952et symbol parameter condition (1) min . (2) max . min . (2) max . min . (2) max . min . (2) max . unit t plh propagation delay c l = 50pf 2 11 2 8 2 7.3 ? ? ns t phl xclkab, xclkba to xbx, xax r l = 500 ? t pzh output enabletime 1.5 13 1.5 8.5 1.5 8 ? ? ns t pzl x oeba , x oeab to xax, xbx t phz output disable time 1.5 10 1.5 8 1.5 7.5 ? ? ns t plz x oeba , x oeab to xax, xbx t su set-up time, high or low 2.5 ? 2.5 ? 2.5 ? ? ? ns xax, xbx to xclkab, xclkba t h hold time, high or low 2 ? 1.5 ? 1.5 ? ? ? ns xax, xbx to xclkab, xclkba t su set-up time, high or low 3 ? 3 ? 3 ? ? ? ns x ceba , x ceab , to xclkab, xclkba t h hold time, high or low 2 ? 2 ? 2 ? ? ? ns x ceba , x ceab , to xclkab, xclkba t w pulse width high or low, xclkab or xclkba (3) 3?3?3???ns t sk (o) output skew (4) ? 0.5 ? 0.5 ? 0.5 ? ? ns
6 military and industrial temperature ranges idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver pulse generator r t d.u.t. v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h preset clear clock enable etc. high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
7 idt54/74fct16925at/bt/ct/et fast cmos 16-bit registered transceiver military and industrial temperature ranges ordering information idt xx temp. range xxxx device type xx package x process pv pa industrial options shrink small outline package thin shrink small outline package 54 74 ? 55c to +125c ? 40c to +85c 16 double-density, 5 volt, high drive e military options cerpack blank b industrial mil-std-883, class b fct xxx family 952at 952bt 952ct 952et 16-bit registered transceiver corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com


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